Manual

target: prerequisite prerequisite prerequisite ...
    recipe

Source

• A line beginning with # is a comment
• '@' at the beginning of a command runs the command but does not copy the line to stdout
• '-' at the beginning of a command runs the command but does not abort make if command fails
• make -n or make --dry-run - Don't actually run any commands; just print them.
• If a target begins with %, the whole rule is a definition of an implicit rule, called pattern rule

• $@ or $(@) contains the name of the target. It does oviously not work in prerequsites, only in recipie!
• $< The name of the first prerequisite. Useful in the recipe
• $* is useful for constructing names of related files.

See Automatic-Variables

1. Every environment variable that make sees when it starts up is transformed into a make variable with the same name and value.
2. An explicit assignment in the makefile overrides the environment
3. An assignment in the makefile can be overridden by the command line argument, eg make CFLAGS='-g -O' [target]

Sources: 1 2

a = Peter
c =  $(a)
d := $(a)
a = Franz
 
test:
        @echo c expands to $(c) # Franz
        @echo d expands to $(d) # Peter

useres expect https://www.gnu.org/software/make/manual/html_node/Command-Variables.html#Command-Variables

Example: file.o is made automatically from file.c with a command of the form `$(CC) -c $(CPPFLAGS) $(CFLAGS)'